DI-MCCR-80500A
Computer Aided Cell Development Data
Computer Aided Cell Development Data documents the process for fabricating integrated circuit cells using computer aids, enabling the Government to independently evaluate contractor-fabricated device reliability.
Approval DateNovember 21, 2006
AMSC Number7646
Preparing Activity—
Project Number—
OPRNS/I5221
DTIC ApplicableNo
GIDEP ApplicableNo
Limitation—
Applicable Forms—
Approval Limitation—
Form Version—
DID Formatdd_form_1664
963C CompliantNo
DISTRIBUTION STATEMENT A: Approved for public release; distribution is unlimited.
Application & Interrelationship
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Use & Relationship
Computer Aided Cell Development Data documents the process for fabrication of integrated circuit cells using computer aids.
Computer Aided Cell Development Data is used by the Government to independently evaluate the reliability of electronic devices fabricated by the contractor.
This Data Item Description (DID) contains the format and content preparation instructions for the data product generated by the specific and discrete task requirement as delineated in the contract.
This DID supercedes DI-MCCR-80500.
This DID is related to DI-MCCR-80499A, Computer Aided Chip Development Data.
Preparation Instructions
1Reference documents.The applicable issue of the documents cited herein, including their approval dates and dates of any applicable amendments, notices, and revisions, shall be as cited in the current issue of the DODISS at the time of solicitation; or for non DODISS-listed documents, as stated herein.
2.1The contractor shall prepare and deliver cell development data in accordance with the following:
2.1.1The contractor shall utilize and submit the computer aided cell development data on digital media in the following order of preference:
2.1.1.28mm Helical Scan Tape
2.1.1.34mm Digital Audio Tape
2.1.2The contractor shall utilize electronic media, in accordance with the instructions for digital submissions, for all other documentation and reports.
2.2Computer Aided Cell Development Data shall be provided in the following formats:
2.2.1Circuit schematic data (identified in Paragraph 3.10d) shall be provided in either SPICE or CDL netlist format.Other formats will be considered with approval at the discretion of the Government Program Manager.
2.2.2Logic equation and/or truth table data (identified in paragraph 3.10f) shall be provided as a simulation model preferably in Verilog or VHDL format.Logic equations are acceptable provided any and all math symbols are defined. Truth tables are acceptable provided all inputs, outputs, and bi-directionals are identified. Truth table columns shall be tab delimited. The contractor shall verify that all input and bi-directional input combinations are accounted for, and that any symbols used in the truth table are defined.
2.2.3Composite layout data (identified in paragraph 3.1.i) shall be provided in the GDSII file (described in DI-IPSC-80409A).
3.1Cell notebook.Consist of data sheets describing each cell. Each sheet contains the following information:
3.1.1Identification.Name and alphanumeric text including date and run number of originating design.
3.1.3Logic equation or truth table.
Schema v3.0Community-maintained · Verify against ASSIST 